Metastability is bound to occur in VLSI designs during clock domain crossing. For a robust and reliable design, metastability needs to be mitigated. To understand how to resolve it and how to build a ...

The push for higher performance at lower power and cost has driven the VLSI industry towards System-on-Chip (SoC) integration resulting in designs with multiple clocks. It is common to see blocks that ...

The most prevalent form of design is synchronous design. This relies on a clock to latch in the results of the previous set of computations ready for the next step. This design paradigm helps to ...