Scientists at the Tokyo Institute of Technology have developed low power, high performance CMOS logic technology that is vital to the future of microprocessors and system-on-chip (SoC) devices for ...

Fig 1. A typical CMOS input circuit comprises a “P” and “N” transistor. One is fully “on” for logic high, and the other is “on” for a logic low. Fig 2. When a CMOS input pin is at logic high or low ...

Low power design has become a cornerstone of modern integrated circuit development, driven by energy efficiency demands and the challenges of scaling in nanometre technologies. Innovations in ...

Nottingham-based SFN (Search for the Next) has characterised its novel transistor-based logic, and claims that it matches CMOS performance even when made in older fabs. It would “enable chip designers ...

In recent years, gallium nitride (GaN) has emerged as a compelling candidate to complement the silicon material used in wireless communication and power conversion applications. Benefits of GaN ...

Non-volatile bistable memory circuits pave the way for highly energy-efficient CMOS logic systems. Non-volatile bistable memory circuits being developed by Satoshi Sugahara and his team at Tokyo Tech ...

Chipmakers continue to scale the CMOS transistor to finer geometries, but the question is for how much longer. The current thinking is that the CMOS transistor could scale at least to the 3nm node in ...

If your introduction to digital electronics came more years ago than you’d care to mention, the chances are you did so with 5V TTL logic. Above 2V but usually pretty close to 5V is a logic 1, below ...

Some people can’t be bothered to read the analog face of a traditional clock. Some people cannot stand the low frequency “hum” of mains current. If you are in either of those categories, you probably ...